AMD patents a chiplet GPU design quite unlike Nvidia and Intels – TechSpot

Figure 2 is a cross-sectional view that comes down from 2 chiplets to the circuit board. Figure 3 depicts the portrays hierarchy. Each chiplet includes several L2 cache(308)banks that are separately addressable, and likewise coherent within a single chiplet. The crosslink connects to the SDFs on all the chiplets, as well as the L3 cache banks on all the chiplets. Figure 4 is a bird’s eye view of one chiplet.

Figure 2 is a cross-sectional view that comes down from 2 chiplets to the circuit board. Figure 3 depicts the illustrates hierarchy. Figure 4 is a bird’s eye view of one chiplet.

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